Helen Orchard
I started my Ph.D at Cambridge in October 2003. Prior to coming to Cambridge I obtained a BEng degree in Materials Science and Engineering at the University of Bath. The course included an industrial placement year at Shell Exploration and Production within the Corrosion and Inspection Group.
Music is my main pastime, my first instrument being classical flute. A few years ago I extended my musical interests and took up the guitar. I now play and sing with local folk groups, and occasionally experiment with composing music. In addition to music I enjoy trying different sports, in the past playing football, rugby and tennis, and this year I joined the women's ice hockey team.
PhD Project: Chip-to-next Level Interconnect Reliability
Electronic components continue to decrease in size, presenting new and exciting challenges in materials selection. One challenge is to create electronics that can withstand high temperature environments (i.e. greater than the standard 125 C maximum). The aim of this project is to study the wire contacts (wire bonds) used to connect silicon chips to chip carriers, and reactions that may occur in high temperature conditions.
The metal used for the wire bond can be different from that used for the bond pad. This creates bimetallic interfaces that can cause reliability issues. At high temperatures, intermetallic compounds can form rapidly at the interfaces. Whilst a small amount of intermetallic can improve adhesion of the wire bond to the film, excessive growth can cause chip failure. A relatively unexplored phenomenon is the effect of current on intermetallic growth at the wire bond/bond pad interface. This is the main reliability aspect studied in this project.
A theoretical model has been produced that predicts a number of intermetallic growth trends, depending on current magnitude and direction. Results of this were presented at the TMS conference in January 2005, and have been accepted for publication in Applied Physics Letters1. Experiments are currently underway to support this theoretical work.
This work has important implications for future scientific research on electronics and for engineering circuit design. Design principles have been created that could be integrated into a chip lifetime reliability model. The model could be used to develop electronic structures to be inserted into extreme environments such as car engines and geothermal wells.
I am grateful to the EPSRC and TWI for the support of this project.
 |
 |
| Illustration of wire bonds. Photo: Kulicke & Soffa | An optical image of an Au wire bond to Al-Si-Cu film heated to 300ºC for 1 hour. The Al film has been completely consumed to form an intermetallic layer. |
1. H. T. Orchard and A. L. Greer, J. Appl. Phys. Lett. (in press)
If you have any comments or suggestions, please contact the webmaster (Rob Cork)