Materials Science and Metallurgy
Assistant Research Professor
BSc University of Heidelberg
MSc Lund University
PhD Lund University
I work on materials and devices for neuromorphic computing and future memory applications. For decades, our Information and Communications Technologies (ICT) have been based on digital memory and the von Neumann architecture. This means that data is stored and processed as 1s and 0s, and memory and processing are physically separated, with a memory hierarchy that separates fast, volatile memory from non-volatile, but slow memory. Consequently, large amounts of time and energy are lost on data transfer and refresh rather than information gain. While we barely notice this when carrying out many nowadays seemingly mundane ICT tasks, these losses become a massive detriment for edge devices (battery life) and for large-scale so-called artificial intelligence systems. Apart from performance limitations, this inefficient ICT operation adds massively to the strain on the environment. The entirety of ICT is estimated to contribute as much to global emission as the aviation industry (4-6%), and it is estimated that the ICT contributions will increase to 15-30% in the coming years. New forms of computer memory can alleviate this significantly.
Neuromorphic computing is a concept whereby ICT design takes inspiration from biological brains and tries to minimise the loss of time and energy in ICT, for example by combining processing and memory physically in the same place. For this, we need new types of devices, whose memory capabilities are not limited to 1 and 0, i.e. one bit per cell, but which can store multiple bits or even a continuous range of values, and which can be tuned gradually between different values. Such devices are often called “memristors”. Of course, they need to operate fast, and ideally, they are non-volatile. With such devices, important compute operations such as matrix-vector multiplications can be carried out directly in the memory space, or the context awareness of large language models can be implemented more efficiently.
I work on various oxide materials systems to create such multi-level memory. My focus is mostly on materials compatible with semiconductor industry processes, e.g. hafnium oxide and silicon oxide. These materials have been used in electronics for decades, but they do not cease to reveal new functionalities. For example, in transistors, hafnium oxide is used as a conventional dielectric – it enables the capacitive control of the transistor gate over the channel semiconductor. For this, we want as few materials defects, such as oxygen vacancies or interface states, as possible. For a multi-level memory cell, however, we want to engineer a controlled amount of oxygen vacancies in the material to achieve optimal functionality. As a third fascinating possibility, hafnium oxide can be made ferroelectric – it can exhibit a remanent polarisation without an applied external field – which is a third application possibility.
I have explored all three of these directions. I studied transistor gate dielectrics during my PhD; now I am investigating multi-level oxide memristors. In or group, we carry out materials deposition and characterisation, device fabrication, and electrical measurements. We have a wide range of capabilities for this in-house, and a wide-ranging network of collaborators, national and international. We also regularly work with industry – startups and world-leading foundries alike – to translate our research into tangible applications.
In an effort to consolidate related research topics across Cambridge, we are setting up the Cambridge Centre for Neuromorphic Computing Materials (https://www.neucam.msm.cam.ac.uk/), and I am involved with the UK-wide NeuMat network (https://www.neumat.co.uk/), Neuroware Innovation and Knowledge Centre, and the Marie-Curie training network MasAuto (https://masauto-net.eu/).
Current computing hardware suffers from a separation of memory and processing, and operates on 1s and 0s. New forms of multi-level memory can combine the two physically in the same place and lead to huge efficiency gains.
M. Hellenbrand, I. Teck, J. L. MacManus-Driscoll, “Progress of emerging non-volatile memory technologies in industry“, MRS Communications, November 2024
M. Hellenbrand, J. L. MacManus-Driscoll, “Multi-level resistive switching in hafnium-oxide-based devices for neuromorphic computing“, Nano Convergence, September 2024
M. Hellenbrand, B. Bakhit, H. Dou, M. Xiao, M. O. Hill, Z. Sun, A. Mehonic, A. Chen, Q. Jia, H. Wang & J. L. MacManus-Driscoll, “Thin film design of amorphous hafnium oxide nanocomposites enabling strong interfacial resistive switching uniformity“, Science Advances, June 2023
M. Hellenbrand, E. Lind, O.-P. Kilpi & L.-E. Wernersson, “Effects of traps in the gate stack on the small-signal RF response of III-V nanowire MOSFETs“, Solid-State Electronics, May 2020
M. Hellenbrand, O.-P. Kilpi, J. Svensson, E. Lind & L.-E. Wernersson, “Low-frequency noise in nanowire and planar III-V MOSFETs“, Microelectronic Engineering, May 2019
M. Hellenbrand, E. Memisevic, M. Berg, O.-P. Kilpi, J. Svensson & L.-E. Wernersson, “Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs“, IEEE Electron Device Letters, September 2017
